1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a CMOS image sensor wherein a photo-transistor capable of performing photo-sensing and active amplification is installed to improve low illumination characteristics while maintaining an existing pixel operation.
2. Discussion of the Related Art
Generally, image sensors are semiconductor devices which convert optical images into electrical signals, and may be roughly classified into charge coupled device (CCD) image sensors and complementary metal oxide silicon (CMOS) image sensors.
However, in a CCD image sensor, a driving system is complex, a large amount of power is consumed and a multistep photo-process is required, resulting in a complex manufacturing process. Further, it is difficult to integrate a controller, a signal processor, an analog/digital (A/D) converter, etc. in one CCD chip. Thus, obstacles to miniaturization of a product exist. Recently, CMOS image sensors have received attention as the next generation technology for overcoming the disadvantages of CCD image sensors.
The CMOS image sensor is based on a CMOS technology which employs a controller, a signal processor, etc. as peripheral circuits. In the CMOS image sensor based on the CMOS technology, a number of MOS transistors corresponding to a number of unit pixels are formed on a semiconductor substrate. A switching system is adopted to sequentially detect outputs of the respective unit pixels through the MOS transistors. Because CMOS technology is employed in the CMOS image sensor, a small amount of power is consumed and a small number of photo-process steps are performed, resulting in a simplified manufacturing process. Furthermore, it is possible to integrate the controller, signal processor, A/D converter, etc. in a CMOS image sensor chip, thereby facilitating miniaturization of a product.
A related art CMOS image sensor will be described with reference to FIG. 1, which is a circuit diagram of a unit pixel of a related art CMOS image sensor having four transistors.
As shown in FIG. 1, a related art CMOS image sensor comprises a photo-sensing device 100, for example, a photodiode, for generating photo-charges and a transfer transistor 101 for receiving a ΦTx signal at its gate and transferring the photo-charges generated by the photo-sensing device 100 to a floating diffusion region FD 102 in response to the received ΦTx signal. The related art CMOS image sensor also includes a reset transistor 103 for receiving an ΦRs signal at its gate and for, in response to the received ΦRs signal, setting the potential PVRS of the floating diffusion region FD 102 to a desired value or discharging charges stored in the floating diffusion region FD 102 to reset the floating diffusion region FD 102. The related art CMOS image sensor also includes a drive transistor 104 for acting as a source follower buffer amplifier in response to a signal inputted to its gate, and a select transistor 105 for performing an addressing operation in response to a signal ΦSEL inputted to its gate. A voltage VDL is applied.
However, in the related art CMOS image sensor, when a small amount of light is incident on the photodiode, which acts to convert an optical signal into an electrical signal, a very small amount of charges may be stored in the photodiode. Thus, it may not be possible to make a distinction between an output signal and noise.
In order to overcome the above problem, a scheme has been proposed which activates the unit pixel of the CMOS image sensor, as shown in FIGS. 2 and 3. FIG. 2 is a circuit diagram of a pixel transistor for amplification, and FIG. 3 is a sectional view of the amplification pixel transistor. The pixel activation scheme will be described with reference to FIGS. 2 and 3. As shown in these drawings, the amplification pixel transistor, denoted by reference numeral 106, is formed on a semiconductor substrate 110. A gate electrode 112 is formed on the semiconductor substrate 110, and N+ diffusion regions 113a and 113b are formed on the semiconductor substrate 110 at opposite sides of the gate electrode 112, respectively. P+ diffusion regions 114a and 114b are formed on the semiconductor substrate 110 around the N+ diffusion regions 113a and 113b, respectively, to connect the gate electrode 112 with the semiconductor substrate 110. The gate electrode 112 is connected with the semiconductor substrate 110 via the P+ diffusion regions 114a and 114b. The N+ diffusion region 113a, which is one terminal of the amplification pixel transistor 106, is grounded. The N+ diffusion region 113b, which is the other terminal of the amplification pixel transistor 106, is connected to the transfer transistor 101.
However, as shown in FIGS. 2 and 3, when the pixel is activated when the pixel circuit is inappropriately configured in a two-dimensional array, the operation of the image sensor is greatly influenced by a variation in capacitor value or output resistor value.